1. Field of the Invention
The present invention relates to a multilayer capacitor, and more particularly, to a decoupling multilayer capacitor having low equivalent series inductance (ESL) and adjustable equivalent series resistance (ESR).
2. Description of the Related Art
In general, a multilayer chip capacitor (MLCC) has a structure such that inner electrodes of different polarities are laminated alternately while interposing a corresponding one of a plurality of dielectric layers. This multilayer chip capacitor can be miniaturized, performing with high capacity and mounted easily, and thus broadly used as parts of various electronic devices.
Notably, a power supply for a central processing unit (CPU) in a computer experiences voltage noise due to rapid change in a load current when supplying a low voltage. Accordingly, the multilayer chip capacitor is widely utilized in the power supply as a decoupling capacitor for suppressing such voltage noise.
The decoupling multilayer chip capacitor is required to have a lower ESL value with an increase in an operating frequency, and studies for reducing ESL have been vigorously conducted.
Also, in order to supply the power more stably, the decoupling multilayer capacitor should have adjustable ESR characteristics. The multilayer capacitor having ESR lower than a required level increases an impedance peak at a parallel resonant frequency due to the ESL of the capacitor and the plane capacitance of a micro-processor package while extremely lowering impedance at a serial resonant frequency.
Therefore, the decoupling multilayer capacitor may be configured to easily adjust ESR characteristics thereof so that a user can achieve flat impedance characteristics of a power distribution network.
As a method for adjusting ESR, a material with high electrical resistance may be utilized as outer and inner electrodes. Such a change in material advantageously ensures high ESR characteristics, while enabling ESL to be maintained at a low level as in the prior art.
However, the high resistant material, when used for outer electrodes, results in a localized heat spot due to current concentration caused by pin holes. Moreover, the high resistant material, when utilized for inner electrodes, needs to keep changing to match with a ceramic material, which is employed to allow for higher capacity.
As another method for improving ESR, U.S. Pat. No. 6,765,781, whose assignee is TDK, discloses a method of connecting inner electrodes in series to each other through a linkage electrode by disposing the linkage electrode outside the capacitor body.
The inner electrodes connected in series to each other can enhance ESR effectively but lengthens a current path, thereby disadvantageously increasing ESL. As described above, in the conventional method for improving a capacitor structure, a decrease in ESL necessitates a decrease in ESR, and contrarily, an increase in ESR necessitates an increase in ESL. Therefore, it has been hard to adjust ESR to a high level while maintaining ESL at a low level.